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this is information on a product in full production. july 2013 docid024654 rev 2 1/29 29 STNS01 li-ion linear battery charger with ldo datasheet - production data features ? charges single-cell li-ion batteries with cc-cv algorithm and charge termination ? charge current programmable up to 200 ma ? 1% accuracy on floating voltage (4.2 v) ? integrated 3.1 v ldo regulator ? automatic power path management ? battery overcharge protection ? battery overdischarge protection ? battery overcurrent protection ? charging timeout ? very low battery leakage in overdischarge/shutdown mode ? low quiescent current ? charge/fault status output ? charger enable input ? available in a 12-lead (3 x 3 mm2) dfn package applications ? portable mp3 players ? portable low-power devices ? fitness portable devices description the STNS01 is a linear charger for single-cell li- ion batteries integrating an ldo regulator and several battery protection functions. the device uses a cc/cv algorithm to charge the battery. the fast-charge current can be programmed using an external resistor. pre- charge current and termination current are scaled accordingly. the floating voltage value is 4.2 v. the input supply voltage is normally used to charge the battery and provide power to the ldo regulator. when a valid input voltage is not present and the battery is not empty, the device automatically switches to battery power. the STNS01 integrates overcharge, overdischarge and overcurrent protection circuitry to prevent the battery from being damaged under fault conditions. it also features a charger enable input to stop the charging process when battery overtemperature is detected by external circuitry. when the shutdown mode is activated, the battery power consumption is reduced to less than 500 na to maximize battery life during shelf time or shipping.the device is available in a 3 3 mm2 12-lead dfn package. dfn12l (3 x 3 mm2) table 1. device summary order code package packaging STNS01pur dfn12l (3 x 3 mm2) 3000 parts per reel www.st.com
contents STNS01 2/29 docid024654 rev 2 contents 1 schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 typical performance characteristics (curves) . . . . . . . . . . . . . . . . . . 10 7 functional pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 operation description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.1 power-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.2 battery charger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.3 battery temperature monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.4 battery overcharge protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.5 battery overdischarge protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.6 battery discharge overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.7 input overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.8 sys and ldo short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.9 in overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.10 shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.11 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.12 reverse current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
docid024654 rev 2 3/29 STNS01 schematic 1 schematic figure 1. application schematic table 2. list of external components component manufacturer part number / description value size c in murata grm188r71a225ke15d 2.2 f0603 c sys murata grm188r71a225ke15d 2.2 f0603 c ldo murata grm188r71a225ke15d 2.2 f0603 c bat murata grm188r61a475ke15d 4.7 f0603 r iset any resistor 1 k ? 13 k 0603 r chg any resistor 600 0603 r div1, r div2 any depending on the batms status 0603 d1 any diode led 0603 load in gnd iset chg ntc bat c ldo c in sd v bus gnd sys r iset ldo alternative load c sys batsns t system r chg battery pack cen batms r div1 r div2 c bat am09934v1
block diagram STNS01 4/29 docid024654 rev 2 2 block diagram figure 2. STNS01 block diagram sys (source) ldo. 3.1v, 100ma usb power supply control block in ldo cc/cv charger m1 m4 enable chg sd m3 m2 current limit bat r iset ntc t i bat sense cen batsns m5 batms iset am09936v1
docid024654 rev 2 5/29 STNS01 pin configuration 3 pin configuration figure 3. pin configuration (top view) table 3. pin description pin name pin number description in 1 input supply voltage. bypass this pin to ground with a 2.2 f capacitor sys 2 system output. bypass this pin to ground with a 2.2 f ceramic capacitor ldo 3 3.1 v ldo output. bypass this pin to ground with a 1 f ceramic capacitor sd 4 shutdown. active high. 500 k internal pull-down chg 5 charging/fault flag. active low cen 6 charger enable pin. active high. 500 k internal pull-up (to ldo) gnd 7 ground ntc 8 battery temperature monitor pin iset 9 fast-charge programming resistor batms 10 battery voltage measurement pin batsns 11 battery voltage sensing. connect as close as possible to the battery?s positive terminal bat 12 battery - positive terminal. bypass this pin to gnd with a 4.7 f ceramic capacitor exposed pad - connect to gnd in iset sd gnd cen chg bat batsns batms sys ldo ntc am12708v1
maximum ratings STNS01 6/29 docid024654 rev 2 4 maximum ratings note: absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. table 4. absolute maximum ratings symbol parameter test conditions value unit v in input supply voltage pin dc voltage -0.3 to +10.0 v non repetitive, 60s pulse length -0.3 to +16.0 v v ldo ldo output pin voltage dc voltage -0.3 to +4.0 v v sys sys pin voltage dc voltage -0.3 to +6.5 v v chg chg pin voltage dc voltage -0.3 to +6.5 v v lgc voltage on logic pins (cen, sd) dc voltage -0.3 to +4.0 v v iset voltage on iset pin dc voltage -0.3 to +2 v v ntc voltage on ntc pin dc voltage -0.3 to 3.1 v v bat , v batsns voltage on bat and batsns pins dc voltage -0.3 to +5.5 v v batms voltage on batms pin dc voltage -0.3 to v bat +0.3 v esd human body model js-001-2010 2000 v t amb operating ambient temperature -40 to +85 c t j maximum junction temperature +125 c t stg storage temperature -65 to +150 c table 5. thermal data symbol parameter value unit r thja thermal resistance junction-ambient 49 c/w r thjc thermal resistance junction-case 4.2 c/w
docid024654 rev 2 7/29 STNS01 electrical characteristics 5 electrical characteristics the values given in the following table are valid for - 40 c < t j < + 85 c, v in = 5 v, v bat = 3.6 v, c ldo = 1 f, c batt = 4.7 f, c in = c sys = 2.2 f, r iset = 1 k , sd = low, cen = high, unless otherwise specified. table 6. electrical characteristics symbol parameter test conditions min. typ. max. unit v in operating input voltage 4.55 5.4 v v inovp input overvoltage protection v in rising 5.6 5.9 6.2 v v inovph input overvoltage protection hysteresis v in falling 200 mv v uvlo undervoltage lockout v in falling 3.95 4.18 4.35 v v uvloh undervoltage lockout hysteresis v in rising 300 mv i in in supply current charger disable mode (cen=low), i sys = i ldo = 0 a 400 a charging, v hot < v ntc < v cold , including r iset current 1.4 ma v float battery floating voltage i bat = 1 ma 4.158 4.2 4.242 v i bat bat pin supply current battery-powered mode (v in electrical characteristics STNS01 8/29 docid024654 rev 2 symbol parameter test conditions min. typ. max. unit v odcr battery voltage overdischarge release threshold 3.0 v r on-ib input to battery on-resistance 1 1.5 ? r on-bs battery to sys on-resistance i sink = 100 ma 0.38 0.55 ? r on- batms batsns to batms on- resistance i sink = 500 a 270 ? v ol output low level (chg) i sink = 5 ma 0.4 v v il logic low input level (sd, cen) v ldo = 3.1 v 0.4 v v ih logic high input level (sd, cen) v ldo = 3.1 v 1.6 v r up cen pull-up resistor 375 500 625 k r down sd pull-down resistor 375 500 625 k v ldo ldo output voltage i ldo = 1 ma 3.007 3.1 3.193 v v out- load ldo static load regulation i ldo = 1 ma to 150 ma 0.002 %/ma i sc ldo short-circuit current r load = 0 250 350 ma i batocp battery discharge overcurrent protection v in < v uvlo or v in > v inovp (powered from bat) 400 650 ma i inlim input current limitation v sys > v ilimscth ; v uvlo < v in < v inovp (powered form in) 1a i inlimsc input current limitation in short- circuit conditions v sys < v ilimscthinovp (powered form in) 400 ma v ilimsct h sys voltage threshold for input current limitation short-circuit detection v uvlo < v in < v inovp 2v v scldo ldo short-circuit protection threshold v in < v uvlo or v in > v inovp (powered from bat) 0.7 v v scsys sys short-circuit protection threshold v in < v uvlo or v in > v inovp (powered from bat) v bat -0.8 v i ntcb ntc pin bias current v ntc = 0.25 v 48 50 52 a v hot thermal management hot threshold increasing ntc temperature 0.234 0.246 0.258 v v cold thermal management cold threshold decreasing ntc temperature 1.28 1.355 1.43 v t hyst hot/cold temperature threshold hysteresis 10 k ntc, ? = 3370 3 c t sd thermal shutdown die temp. 180 c f fault chg pin blinking frequency fault condition 1 hz t chgd input voltage connection to charging-start delay v bat = 3.5v, r ntc = 10 k , battery detection not included (t bdsrc + t bdsnk ) 240 ms table 6. electrical characteristics (continued)
docid024654 rev 2 9/29 STNS01 electrical characteristics symbol parameter test conditions min. typ. max. unit t ocd overcharge detection delay v bat > v ochg , v uvlo < v in < v inovp 1.2 s t odd overdischarge detection delay v bat < v odc v in < v uvlo or v in > v inovp 400 ms t dod discharge overcurrent detection delay i bat > i batocp , v in < v uvlo or v in > v inovp 14 ms t pfd pre-charge to fast-charge transition deglitch time rising 100 ms t fpd fast-charge to pre-charge fault deglitch time 10 ms t end end-of-charge deglitch time 100 ms t pre pre-charge timeout v bat < v pre , charging 1800 s t fast fast-charge timeout 36000 s t ntcd battery temperature transition deglitch time 100 ms t pw cen/sd valid input pulse width 10 ms t thpd thermal protection deglitch time 10 ms table 6. electrical characteristics (continued)
typical performance characteristics (curves) STNS01 10/29 docid024654 rev 2 6 typical performance characteristics (curves) figure 4. start-up figure 5. start - up v bat = 0 v v in = 0 v to 5 v, v bat = 3.6 v, i chg = 200 ma v in = 0 v to 5 v, v bat = 30 v, i chg = 100 ma figure 6. input ovp figure 7. i pre-chg to i fast-chg v in = 5.5 v to 6.8 v, v bat = 3.6 v, i chg = 100 ma v in = 5 v, v bat = 1.8v - 3.6 v, i chg = 200 ma figure 8. plug usb figure 9. unplug usb (battery powered) v in = 0 v to 5 v, v bat = 3.6 v, i chg = 200 ma v in = 5 v to 0 v, v bat = 3.6 v, i chg = 200 ma vsys 2 v/div i chg 0.05 a/div 100 ms/div ldo 2 v/div vin 2 v/div vsys 2 v/div ldo 2 v/div vin 2 v/div vbat 1v/div 100 ms/div vin 3 v/div ldo 3 v/div vbat 3 v/div i chg 0.1 a/div 500 ms/div ipre-chg ifast-chg no-chg vbat 0.9 v/div i chg 0.08 a/div 50 ms/div i chg 0.1 v/div ldo 2 v/div vin 3v/div vbat 2 v/div 200 ms/div i chg 0.2 v/div ldo 2 v/div vin 3v/div vbat 2 v/div 50 ms/div
docid024654 rev 2 11/29 STNS01 typical performance characteristics (curves) figure 10. r on-bs vs. temperature figure 11. battery voltage vs. charge current figure 12. load transient ldo pre-chg figure 13. load transient ldo fast-chg v in = 5 v, v bat < v pre , i pre = 20 ma, i ldo = 0 to 50 ma v in = 5 v, v bat v pre , i fast = 100 ma, i ldo = 0 to 50 ma figure 14. v ldo vs. temperature figure 15. v ldo load static regulation 0 0.1 0.2 0.3 0.4 0.5 0.6 -100 -50 0 50 100 150 temperature ronbs v in = 5 v , v bat = 3.6 v , i chg = 100 ma 4.16 4.17 4.18 4.19 4.2 4.21 4.22 4.23 4.24 0 100 200 300 400 500 600 i chg (ma) v bat (v) i ldo 0.02 a/div ldo 0.1 v/div offset 3.1 v 1 ms/div i ldo 0.02 a/div ldo 0.1 v/div offset 3.1 v 1 ms/div 3 3.03 3.06 3.09 3.12 3.15 3.18 3.21 3.24 -100 -50 0 50 100 150 t [c] ldo [v] v in = 5 v , v bat = 3.6 v , i chg = 1 ma 3 3.03 3.06 3.09 3.12 3.15 3.18 3.21 3.24 0 40 80 120 160 200 i ldo [ma] ldo [v] v in = 5 v , v bat = 3.6 v, i chg = 100 ma
functional pin description STNS01 12/29 docid024654 rev 2 7 functional pin description pin 1: in 5 v input supply voltage. this pin supplies power to the sys pin and the battery charger when the input voltage is higher than v uvlo and lower than v inovp . bypass this pin to gnd with a 2.2 f ceramic capacitor. pin 2: sys ldo input voltage. this pin can be used to supply up to 100 ma to external devices. the voltage source of this pin can be either in or bat depending on the operating conditions. refer to tab le 7 for more details. bypass this pin to gnd with a 2.2 f ceramic capacitor. pin 3: ldo ldo output voltage. this pin outputs a 3.1 v regulated voltage and can supply up to 100 ma. bypass this pin to gnd with a 1 f ceramic capacitor. pin 4: sd shutdown input. a logic high level on this pin when the input voltage (v in ) is not valid makes the device enter shutdown mode. in this mode the battery drain is reduced to less than 500 na and the sys and ldo voltages are not present. connecting a valid input voltage (v uvlo STNS01 doesn't exit shutdown mode (see figure 16 ). this pin has an internal 500 k pull-down resistor. table 7. sys pin voltage v in v bat v sys ldo > v uvlo & < v inovp x (don?t care) v in (1) 1. voltage drop over internal mosfets not included. on < v uvlo < v odc (2) 2. v odcr if shutdown mode or ov erdischarge protection has been previously activated. not powered off < v uvlo > v odc (2) v bat (1) on > v inovp < v odc (2) not powered off > v inovp > v odc (2) v bat (1) on
docid024654 rev 2 13/29 STNS01 functional pin description figure 16. shutdown mode entry and exit (not to scale, deglitch times not included) pin 5: chg active-low open-drain charging/fault flag. this pin is active when the charging process is ongoing and toggles at 1 hz if a fault condition has been detected. refer to ta ble 8 for more details. this pin is active only when a valid voltage is connected to the in input (v uvlo < v in < v inovp ). pin 6: cen charger enable pin. a logic low level on this pin disables the battery charger. a transition from high to low and then back to high restarts the charger when the charge cycle has been stopped for one of the following reasons: ? charging timeout (pre-charge, fast-charge) ? battery voltage below v pre after the fast-charge has already started ? end of charge the cen pin has no effect if the charge cycle has been stopped for a battery overcharge condition. table 8. chg pin state (v uvlo < v in < v inovp ) device state chg pin state not charging high z charging low battery temperature fault toggling overcharge fault toggling charging timeout (precharge, fast charge) toggling battery voltage below v pre after the fast charge starts toggling am10402v1 the image canno t be displa yed. your comp uter may not have enoug h memo ry to open the image , or the image may have bee shutdown the image canno t be displa yed. your comp uter may not have enoug h memo ry to open the image , or the image may have bee shutdown the image cannot be displayed . your computer may not have enough memory to open the image, or the image may have been corrupte d. restart your computer and t shutdown v bat v in sd v odcr v odc v inovp v uvlo
functional pin description STNS01 14/29 docid024654 rev 2 if the charger is temporarily stopped because of the battery temperature being out of the normal range, a logic low level on the cen pin disables the charger and resets the charging timeout timers. if cen is then driven high again the charger is restarted only if a no-fault condition is active (including battery temperature out of range). this pin has an internal 500 k pull-up resistor connected to ldo and must be left floating or tied high at power on. figure 17. charge disable / enable pin 7: gnd device ground pin. pin 8: ntc battery temperature monitoring pin. connect the battery's ntc resistor to this pin. the charging cycle is put on hold when the battery temperature is outside of the safe temperature range (0 c to 45 c). see section 8.3 for more details. pin 9: iset fast-charge current programming pin. connect a resistor (r iset ) to ground to set the fast- charge current (i fast ) according to the following equation: i fast = v iset / r iset * k where v iset = 1 v and k = 200. fast-charge currents ranging from 15 ma to 200 ma can be programmed. pre-charge current and end of charge current are scaled accordingly. charging currents higher than 200 ma can be programmed but the increased voltage drop over internal mosfets can limit the minimum input voltage (v in ) needed to obtain full charge. pin 10: batms battery voltage measurement pin. this pin is internally shorted to the batsns pin during normal operating conditions to monitor the battery voltage. the batms pin is disconnected from the battery if the ldo output voltage drops to zero (battery discharge overcurrent, battery overdischarge, shutdown mode, short-circuit on sys or ldo). vin 3 v/div cen 3 v/div vbat 3 v/div i chg 0.1 a/div 100 ms/div v in = 5.0 v, v bat = 3.2 v, i chg = 80 ma disable chg enable chg
docid024654 rev 2 15/29 STNS01 functional pin description pin 11: batsns battery voltage sense pin. this pin is needed to ensure accuracy on the floating voltage and battery voltage protection thresholds. the batsns pin must be connected as close as possible to the battery's positive terminal. pin 12: bat battery's positive terminal connection pin. bypass this pin to gnd with a 4.7 f ceramic capacitor.
operation description STNS01 16/29 docid024654 rev 2 8 operation description the STNS01 is a power management ic integrating a battery charger with power path function, battery protection circuitry, battery temperature monitoring and a 3.1 v 100 ma ldo. when a valid input voltage (v in ) is present on the in pin, after security checks are performed, the battery charger starts charging the battery using a constant-current/constant- voltage charging algorithm. the input voltage (v in ) is considered to be valid if it is higher than v uvlo and lower than v inovp . the power path architecture allows charging the battery and supplying the system at the same time. when the input voltage is not valid, the ldo (and every external ic connected to sys) is supplied by the battery through a low resistance path. the device also provides protection to the battery against the following fault conditions: ? overcharge ? overdischarge ? charge overcurrent ? discharge overcurrent if a fault condition is detected while the input voltage is valid (v uvlo < v in < v inovp ), the chg pin starts toggling to inform the control logic that an error occurred. the device can also be put in reduced battery drain mode (shutdown, i bat < 500 na) to maximize battery life during end-product shipping and shelf time. 8.1 power-on when the device is in shutdown mode, the pins ldo and sys are not supplied. in order to turn the device on a valid input voltage must be connected (v in ). the cen pin must be floating or tied high during power-on for proper operation. 8.2 battery charger the STNS01's battery charger is designed to charge single cell li-ion batteries up to 4.2 v using a cc-cv charging algorithm (see figure 6 ). when a valid input voltage is detected, the STNS01 starts the charge cycle and the chg pin switches from high impedance to low level. the charging process starts if the battery voltage is higher than v batmin . if the battery is deeply discharged (the battery voltage is lower than v pre and higher than v batmin ) the charger enters the pre-charge phase and starts charging in constant-current mode using a low current (i pre = 20% i fast ). if the battery voltage does not reach the v pre threshold within t pre , the charging process is stopped and a fault is signaled. when the battery voltage reaches the v pre threshold, the constant-current fast-charge phase is entered and the charging current is increased to i fast . the value of i fast can be programmed from 15 ma to 200 ma using an external resistor as described in the i set pin description ( section 7 ).
docid024654 rev 2 17/29 STNS01 operation description once the fast-charge phase has started, if the battery voltage decreases again below v pre , the charging process is stopped and a fault is signaled. the constant-current fast-charge phase lasts as long as the battery voltage is lower than v float . when v bat reaches v float , the charging algorithm switches to constant-voltage (cv) mode. during the cv mode the battery voltage is regulated to v float and the charging current starts decreasing. when the charging current reaches the i end threshold (i end = 10% i fast ), the charging process is stopped and the chg pin is put in high impedance. if the fast-charge phase is not terminated within t fast , the charging process is stopped and a fault is signaled. the battery temperature is monitored throughout the charging cycle for safety reasons. see section 8.3 for more details. refer to figure 18 for a simplified flowchart of the charging process.
operation description STNS01 18/29 docid024654 rev 2 figure 18. charging flowchart am12709v1 start end t pr e timer expired ? pre-charge v bat v ochg ? yes stop charger , start alarm no end always active during charge actions pre-charge: starts t pre timer, starts charging in cc mode at i pre fast-charge cc: starts t fast timer, increases charge currentto i fast fast-charge cv: activates the constant-voltagecontrol loop start alarm: the chg pin starts toggling
docid024654 rev 2 19/29 STNS01 operation description figure 19. cc-cv charging profile (not to scale) figure 20. charging cycle profile 8.3 battery temperature monitoring the STNS01 integrates the comparators, biasing circuit and control logic needed to monitor the battery temperature through an external ntc resistor. this feature is active only during the battery charging process in order to save power when the system is supplied from the battery. when the battery temperature goes outside the normal operating range (0 - 45 c), the charging process is put on hold, the alarm signal is activated (the chg pin toggles) but the charging timeout timers are kept running. am09939v1 t i bat v bat v float v pre i fast i pre i end off pre fast off cc cv fast 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 8:55 9:38 10:22 11:05 11:48 12:31 i batt [ma] v batt [v] time [h:m] v in = 5 v; v sys no load; ldo load = 100 ma; riset = 1 k vbatt ibatt am17198v1
operation description STNS01 20/29 docid024654 rev 2 if the temperature goes back into the normal operating range before the maximum charging time has elapsed, the charging process is resumed from where it left off and the alarm signal is cleared. if the charging timeout expires while the temperature is still outside the normal operationg range, the charging process is stopped but can be restarted using the cen pin. both temperature thresholds feature a 3 c hysteresis. the battery temperature monitoring block is designed to work with an ntc thermistor having r 25 = 10 k and ? = 3370 (e.g. mitsubishi th05-3h103f). 8.4 battery overcharge protection the battery overcharge protection is a safety feature which is active when a valid input voltage is connected and prevents the battery voltage from increasing over v ochg . when an overcharge condition is detected, the current path from the input to the battery is blocked and the fault signal is activated (the chg pin toggles). when the battery voltage falls again under v ochg the input voltage (v in ) must be disconnected and re-connected to restore normal operating conditions. 8.5 battery overdischarge protection when there is no valid input voltage and the device is running on battery power, the battery voltage is monitored to avoid overdischarge. if the battery voltage falls below v odc for more than t odd , the device is turned off and battery drain is reduced to less than 500 na. this condition is called the overdischarge state. when a valid input voltage is connected while in the overdischarge state, the charger and the ldo are activated. if the input voltage is then disconnected, normal operation is restored only if the battery voltage has increased above the overdischarge release threshold (v odcr ), otherwise the STNS01 remains in the battery overdischarge state. figure 21. discharging cycle profile am17199v1 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 5:52 6:01 6:10 6:18 6:27 6:36 i batt [ma] v batt [v] time [ h:m ] v batt i batt
docid024654 rev 2 21/29 STNS01 operation description 8.6 battery discharge overcurrent protection when the STNS01 is powered from the bat pin, a discharge overcurrent protection circuit disables the device if the battery current exceeds i batocp for more than t dod . a valid input voltage (v in ) must be connected to restore normal operating conditions. 8.7 input overcurrent protection when the STNS01 is powered from the in pin, a current limitation circuit prevents the input current from increasing up to potentially destructive values. when v sys is lower than v ilimscth , the input current is limited to i inlimsc in order to have reduced power dissipation in short-circuit conditions. as soon as v sys increases over v ilimscth , the current limitation value is increased to i inlim . 8.8 sys and ldo short-circuit protection in case of an abrupt short-circuit on sys or ldo, the STNS01 is immediately turned off (no deglitch). this short-circuit protection intervenes when the sys voltage drops below v scsys or the ldo output voltage drops below v scldo . 8.9 in overvoltage protection the STNS01 is normally powered from the battery when v in > v inovp while it is powered from the in pin when v uvlo < v in < v inovp . in the latter case, if the input voltage temporarily increases over v inovp due to a poorly regulated power supply, the STNS01 switches to battery power to protect any external circuit connected to sys. if the input voltage (v in ) returns into the normal range, the device's supply voltage is switched back to the in pin. 8.10 shutdown mode a high level on the shutdown digital input pin (sd) when no valid input voltage is connected makes the device enter shutdown (low power) mode. battery drain is then reduced to less than 500 na. the exit conditions for the shutdown mode are the same as for the overdischarge state (valid v in connected and v bat > v odcr ). 8.11 thermal shutdown the STNS01 is protected against overheating which might be generated by the combination of ambient temperature and internal heating due to power dissipation. when the die temperature exceeds t sd the device is turned off. in order to restore normal operation the input voltage (v in ) must be disconnected and re- connected.
operation description STNS01 22/29 docid024654 rev 2 8.12 reverse current protection in order to prevent undesired battery discharge, when the input voltage (v in ) is lower than the battery voltage (v bat ), the current path from bat to in is blocked.
docid024654 rev 2 23/29 STNS01 package mechanical data 9 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions, and product status are available at: www.st.com . ecopack is an st registered trademark. table 9. dfn12l (3 x 3 x 0.75 mm) mechanical data dim. mm inch min. typ. max. min. typ. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0 0.02 0.05 0 0.001 0.002 a3 0.20 0.008 b 0.18 0.25 0.30 0.007 0.010 0.012 d 2.85 3 3.15 0.112 0.118 0.124 d2 1.87 2.02 2.12 0.074 0.080 0.083 e 2.85 3 3.15 0.112 0.118 0.124 e2 1.06 1.21 1.31 0.042 0.048 0.052 e 0.45 0.018 l 0.30 0.40 0.50 0.012 0.016 0.020
package mechanical data STNS01 24/29 docid024654 rev 2 figure 22. dfn12l (3 x 3 x 0.75 mm) drawing dimensions 8085116_a
docid024654 rev 2 25/29 STNS01 package mechanical data figure 23. tape drawing (dimensions in mm.) tape_7875978_m
package mechanical data STNS01 26/29 docid024654 rev 2 figure 24. reel drawing (dimensions in mm.) reel_7875978_m
docid024654 rev 2 27/29 STNS01 package mechanical data figure 25. dfn12l (3 x 3 mm2) footprint recommended data
revision history STNS01 28/29 docid024654 rev 2 10 revision history table 10. document revision history date revision changes 17-may-2013 1 initial release. 15-jul-2013 2 updated table 6: electrical characteristics .
docid024654 rev 2 29/29 STNS01 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not authorized for use in weapons. nor are st products designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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